Novel Method of Realization of Scalable VLSI Adaptive Digital Beamforming Architecture for Phased Array Radar

This This paper describes a novel method for the hardware Design and realization of adaptive filter for the application of Adaptive Digital beam former suitable for FPGAs. The planar phased array configuration considered in this case is sixteen element array. Design approach followed is modular design and each one of the modules is reused to make the sixteen element planar array configuration. One of the most efficient Adaptive algorithms from the hardware realization aspect is Inverse QRD-RLS algorithm. This algorithm is implemented in a systolic array structure where in the optimal weights are calculated in much less time and is numerically more stable compared to other traditional adaptive algorithms like LMS, RLS etc. Also Inverse QRD-RLS algorithm is suitable for parallel and pipelined implementation thus making it very useful in the applications where speed, accuracy and numerical stability are of utmost importance; such as Phased Array Radar. High performances FPGA Kintex--7 is employed to implement the VLSI architectures.